简介:WithintheATLASexperimentTrigger/DAQandDCSarebothlogicallyandphysicallyseparated.Neverthelessthereisaneedtocommunicate.TheinitialproblemdefinitionandanalysissuggestedthreesubsystemstheTrigger/DAQDCSCommunication(DDC)projectshouldsupporttheabilityto:1.exchangedatabetweenTrigger/DAQandDCS;2.sendalarmmessagesfromDCStoTrigger/DAQ;3.issuecommandstoDCSfromTrigger/DAQ.Eachsubsystemisdevelopedandimplementedindependentlyusingacommonsoftwareinfrastructure.AmongthevarioussubsystemsoftheATLASTrigger/DAQtheOnlineisresponsibleforthecontrolandconfiguration.Itistheglueconnectingthedifferentsystemssuchasdataflow.level1andhigh-leveltriggers.TheDDCusesthevariousOnlinecomponentsasaninterfacepointontheTrigger/DAQsidewiththePVSSIISCADAsystemontheDCSsideandaddressesissuessuchaspartitioning,timestamps,eventnumbers,hierarchy,authorizationandsecurity,PVSSIIisacommercialproductchosenbyCERNtobetheSCADAsystemforallLHCexperiments,ItsAPIprovidesfullaccesstoitsdatabase,whichissufficienttoimplementthe3subsystemsoftheDDCsoftware,TheDDCprojectadoptedtheOnlineSoftwareProcess,whichrecommendsabasicsoftwarelife-cycle:problemstatement,analysis,design,implementationandtesting.Eachphaseresultsinacorrespondingdocumentorinthecaseoftheimplementationandtesting,apieceofcode,InspectionandreviewtakeamajorroleintheOnlinesoftwareprocess,TheDDCdocumentshavebeeninspectedtodetectflawsandresultedinaimprovedquality.AfirstprototypeoftheDDCisreadyandforeseentobeusedatthetest-beamduringsummer2001.
简介:使用像增强型电荷耦合器件(intensifiedchargecoupleddevice,IccD)相机系统时,需要对像增强器的选通时刻、选通宽度以及增益大小进行控制。将现场可编程逻辑门阵列(fieldprogrammablegatearray,FPGA)和专业数字延时芯片AD9501配合使用,可以产生延时和脉宽均可大动态范围、高分辨数字调节的脉冲,同时保证延时精度,从而精确控制像增强器的选通时刻和选通宽度;利用FPGA控制数字电位器MCP42010,调节像增强器微通道板两端高压,可实现对像增强器增益的控制;采用RS485总线方式完成上位计算机与FPGA的远程通信,可实现程控功能。程控电路输出的选通脉冲,其延时动态范围为110ns~4.3ms,脉宽动态范围为0~4.3ms,分辨率均为65ps,脉冲延时抖动的均方根不大于147ps;实现了256挡位的增益调节。
简介:基于计算机串口通信和功率型金属氧化物半导体场效应晶体管,设计研制了程控产生单次快前沿负高压脉冲的信号发生器。其性能指标为高压脉冲幅度一100~-1000V,脉冲宽度40ns~2μs,脉冲前沿随脉冲幅度和宽度变化,可小于30ns,输出负载为50Ω作为一种模拟源,该高压脉冲信号发生器已用于小功率气体放电管的高压保护特性实验研究中。