Overview of Energy-Efficient Successive-Approximation Analog-to-Digital Converters： State-of-the-Art and a Design Example-中国期刊网

摘要 Thispapermakesareviewofstate-of-theartsdesignsofsuccessive-approximationregisteranalog-to-digitalconverters(SARADCs).Methodsandtechniquespecificationsarecollectedinviewofinnovativeideas.Attheendofthispaper,adesignexampleisgiventoillustratetheproceduretodesignanSARADC.Anewmethod,whichextendsthewidthoftheinternalclock,isalsoproposedtofacilitatedifferentsamplingfrequencies,whichprovidesmoretimeforthedigital-to-analogconvert(DAC)andcomparatortosettle.The10bitADCissimulatedin0.13mCMOSprocesstechnology.Thesignal-to-noiseanddistortionratio(SNDR)is54.41dBata10MHzinputwitha50MS/ssamplingrate,andthepoweris330W.

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Overview of Energy-Efficient Successive-Approximation Analog-to-Digital Converters： State-of-the-Art and a Design Example

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Overview of Energy-Efficient Successive-Approximation Analog-to-Digital Converters： State-of-the-Art and a Design Example

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